/********************************************************************
 * Copyright (C) 2013-2014 Texas Instruments Incorporated.
 * 
 *  Redistribution and use in source and binary forms, with or without 
 *  modification, are permitted provided that the following conditions 
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright 
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the 
 *    documentation and/or other materials provided with the   
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
*/
#ifndef CSLR_CXSTM_TETRIS_H_
#define CSLR_CXSTM_TETRIS_H_

#ifdef __cplusplus
extern "C"
{
#endif
#include <ti/csl/cslr.h>
#include <ti/csl/tistdtypes.h>


/**************************************************************************
* Register Overlay Structure for cxstm_registers
**************************************************************************/
typedef struct {
    volatile Uint32 STMDMASTARTR;
    volatile Uint32 STMDMASTOPR;
    volatile Uint32 STMDMASTATR;
    volatile Uint32 STMDMACTLR;
    volatile Uint8  RSVD0[232];
    volatile Uint32 STMDMAIDR;
    volatile Uint32 STMHEER;
    volatile Uint8  RSVD1[28];
    volatile Uint32 STMHETER;
    volatile Uint8  RSVD2[64];
    volatile Uint32 STMHEMCR;
    volatile Uint8  RSVD3[140];
    volatile Uint32 STMHEMASTR;
    volatile Uint32 STMHEFEAT1R;
    volatile Uint32 STMHEIDR;
    volatile Uint32 STMSPER;
    volatile Uint8  RSVD4[28];
    volatile Uint32 STMSPTER;
    volatile Uint8  RSVD5[60];
    volatile Uint32 STMSPSCR;
    volatile Uint32 STMSPMSCR;
    volatile Uint32 STMSPOVERRIDER;
    volatile Uint32 STMSPMOVERRIDER;
    volatile Uint32 STMSPTRIGCSR;
    volatile Uint8  RSVD6[12];
    volatile Uint32 STMTCSR;
    volatile Uint32 STMTSSTIMR;
    volatile Uint8  RSVD7[4];
    volatile Uint32 STMTSFREQR;
    volatile Uint32 STMSYNCR;
    volatile Uint32 STMAUXCR;
    volatile Uint8  RSVD8[8];
    volatile Uint32 STMSPFEAT1R;
    volatile Uint32 STMSPFEAT2R;
    volatile Uint32 STMSPFEAT3R;
    volatile Uint8  RSVD9[60];
    volatile Uint32 STMITTRIGGER;
    volatile Uint32 STMITATBDATA0;
    volatile Uint32 STMITATBCTR2;
    volatile Uint32 STMITATBID;
    volatile Uint32 STMITATBCTR0;
    volatile Uint8  RSVD10[4];
    volatile Uint32 STMITCTRL;
    volatile Uint8  RSVD11[156];
    volatile Uint32 STMCLAIMSET;
    volatile Uint32 STMCLAIMCLR;
    volatile Uint8  RSVD12[8];
    volatile Uint32 STMLAR;
    volatile Uint32 STMLSR;
    volatile Uint32 STMAUTHSTATUS;
    volatile Uint8  RSVD13[12];
    volatile Uint32 STMDEVID;
    volatile Uint32 STMDEVTYPE;
    volatile Uint32 STMPIDR4;
    volatile Uint32 STMPIDR5;
    volatile Uint32 STMPIDR6;
    volatile Uint32 STMPIDR7;
    volatile Uint32 STMPIDR0;
    volatile Uint32 STMPIDR1;
    volatile Uint32 STMPIDR2;
    volatile Uint32 STMPIDR3;
    volatile Uint32 STMCIDR0;
    volatile Uint32 STMCIDR1;
    volatile Uint32 STMCIDR2;
    volatile Uint32 STMCIDR3;
    volatile Uint8  RSVD14[4];
} CSL_Cxstm_tetrisRegs;


/**************************************************************************
* Register Macros
**************************************************************************/

/* STMDMASTARTR */
#define CSL_CXSTM_TETRIS_STMDMASTARTR                           (0x0U)

/* STMDMASTOPR */
#define CSL_CXSTM_TETRIS_STMDMASTOPR                            (0x4U)

/* STMDMASTATR */
#define CSL_CXSTM_TETRIS_STMDMASTATR                            (0x8U)

/* STMDMACTLR */
#define CSL_CXSTM_TETRIS_STMDMACTLR                             (0xCU)

/* STMDMAIDR */
#define CSL_CXSTM_TETRIS_STMDMAIDR                              (0xF8U)

/* STMHEER */
#define CSL_CXSTM_TETRIS_STMHEER                                (0xFCU)

/* STMHETER */
#define CSL_CXSTM_TETRIS_STMHETER                               (0x11CU)

/* STMHEMCR */
#define CSL_CXSTM_TETRIS_STMHEMCR                               (0x160U)

/* STMHEMASTR */
#define CSL_CXSTM_TETRIS_STMHEMASTR                             (0x1F0U)

/* STMHEFEAT1R */
#define CSL_CXSTM_TETRIS_STMHEFEAT1R                            (0x1F4U)

/* STMHEIDR */
#define CSL_CXSTM_TETRIS_STMHEIDR                               (0x1F8U)

/* STMSPER */
#define CSL_CXSTM_TETRIS_STMSPER                                (0x1FCU)

/* STMSPTER */
#define CSL_CXSTM_TETRIS_STMSPTER                               (0x21CU)

/* STMSPSCR */
#define CSL_CXSTM_TETRIS_STMSPSCR                               (0x25CU)

/* This register allows a debugger to program which masters the STMSPSCR
 * applies to. */
#define CSL_CXSTM_TETRIS_STMSPMSCR                              (0x260U)

/* STMSPOVERRIDER */
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER                         (0x264U)

/* STMSPMOVERRIDER */
#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER                        (0x268U)

/* STMSPTRIGCSR */
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR                           (0x26CU)

/* STMTCSR */
#define CSL_CXSTM_TETRIS_STMTCSR                                (0x27CU)

/* STMTSSTIMR */
#define CSL_CXSTM_TETRIS_STMTSSTIMR                             (0x280U)

/* STMTSFREQR */
#define CSL_CXSTM_TETRIS_STMTSFREQR                             (0x288U)

/* STMSYNCR */
#define CSL_CXSTM_TETRIS_STMSYNCR                               (0x28CU)

/* STMAUXCR */
#define CSL_CXSTM_TETRIS_STMAUXCR                               (0x290U)

/* STMSPFEAT1R */
#define CSL_CXSTM_TETRIS_STMSPFEAT1R                            (0x29CU)

/* STMSPFEAT2R */
#define CSL_CXSTM_TETRIS_STMSPFEAT2R                            (0x2A0U)

/* Indicates the features of the STM. */
#define CSL_CXSTM_TETRIS_STMSPFEAT3R                            (0x2A4U)

/* Integration Test for Cross-Trigger Outputs Register */
#define CSL_CXSTM_TETRIS_STMITTRIGGER                           (0x2E4U)

/* Controls the value of the ATDATAM output in integration mode: */
#define CSL_CXSTM_TETRIS_STMITATBDATA0                          (0x2E8U)

/* Returns the value of the ATREADYM and AFVALIDM inputs in integration mode. */
#define CSL_CXSTM_TETRIS_STMITATBCTR2                           (0x2ECU)

/* Controls the value of the ATIDM output in integration mode. */
#define CSL_CXSTM_TETRIS_STMITATBID                             (0x2F0U)

/* Controls the value of the ATVALIDM, AFREADYM, and ATBYTESM outputs in
 * integration mode. */
#define CSL_CXSTM_TETRIS_STMITATBCTR0                           (0x2F4U)

/* STMITCTRL */
#define CSL_CXSTM_TETRIS_STMITCTRL                              (0x2FCU)

/* STMCLAIMSET */
#define CSL_CXSTM_TETRIS_STMCLAIMSET                            (0x39CU)

/* STMCLAIMCLR */
#define CSL_CXSTM_TETRIS_STMCLAIMCLR                            (0x3A0U)

/* STMLAR */
#define CSL_CXSTM_TETRIS_STMLAR                                 (0x3ACU)

/* STMLSR */
#define CSL_CXSTM_TETRIS_STMLSR                                 (0x3B0U)

/* STMAUTHSTATUS */
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS                          (0x3B4U)

/* STMDEVID */
#define CSL_CXSTM_TETRIS_STMDEVID                               (0x3C4U)

/* STMDEVTYPE */
#define CSL_CXSTM_TETRIS_STMDEVTYPE                             (0x3C8U)

/* STMPIDR0 */
#define CSL_CXSTM_TETRIS_STMPIDR0                               (0x3DCU)

/* STMPIDR1 */
#define CSL_CXSTM_TETRIS_STMPIDR1                               (0x3E0U)

/* STMPIDR2 */
#define CSL_CXSTM_TETRIS_STMPIDR2                               (0x3E4U)

/* STMPIDR3 */
#define CSL_CXSTM_TETRIS_STMPIDR3                               (0x3E8U)

/* STMPIDR4 */
#define CSL_CXSTM_TETRIS_STMPIDR4                               (0x3CCU)

/* STMPIDR5 */
#define CSL_CXSTM_TETRIS_STMPIDR5                               (0x3D0U)

/* STMPIDR6 */
#define CSL_CXSTM_TETRIS_STMPIDR6                               (0x3D4U)

/* STMPIDR7 */
#define CSL_CXSTM_TETRIS_STMPIDR7                               (0x3D8U)

/* STMCIDR0 */
#define CSL_CXSTM_TETRIS_STMCIDR0                               (0x3ECU)

/* STMCIDR1 */
#define CSL_CXSTM_TETRIS_STMCIDR1                               (0x3F0U)

/* STMCIDR2 */
#define CSL_CXSTM_TETRIS_STMCIDR2                               (0x3F4U)

/* STMCIDR3 */
#define CSL_CXSTM_TETRIS_STMCIDR3                               (0x3F8U)


/**************************************************************************
* Field Definition Macros
**************************************************************************/

/* STMDMASTARTR */

#define CSL_CXSTM_TETRIS_STMDMASTARTR_START_MASK                (0x00000001U)
#define CSL_CXSTM_TETRIS_STMDMASTARTR_START_SHIFT               (0U)
#define CSL_CXSTM_TETRIS_STMDMASTARTR_START_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMDMASTARTR_START_START               (0x00000001U)

#define CSL_CXSTM_TETRIS_STMDMASTARTR_RESETVAL                  (0x00000000U)

/* STMDMASTOPR */

#define CSL_CXSTM_TETRIS_STMDMASTOPR_STOP_MASK                  (0x00000001U)
#define CSL_CXSTM_TETRIS_STMDMASTOPR_STOP_SHIFT                 (0U)
#define CSL_CXSTM_TETRIS_STMDMASTOPR_STOP_RESETVAL              (0x00000000U)
#define CSL_CXSTM_TETRIS_STMDMASTOPR_STOP_STOP                  (0x00000001U)

#define CSL_CXSTM_TETRIS_STMDMASTOPR_RESETVAL                   (0x00000000U)

/* STMDMASTATR */

#define CSL_CXSTM_TETRIS_STMDMASTATR_STATUS_MASK                (0x00000001U)
#define CSL_CXSTM_TETRIS_STMDMASTATR_STATUS_SHIFT               (0U)
#define CSL_CXSTM_TETRIS_STMDMASTATR_STATUS_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMDMASTATR_STATUS_IDLE                (0x00000000U)
#define CSL_CXSTM_TETRIS_STMDMASTATR_STATUS_ACTIVE              (0x00000001U)

#define CSL_CXSTM_TETRIS_STMDMASTATR_RESETVAL                   (0x00000000U)

/* STMDMACTLR */

#define CSL_CXSTM_TETRIS_STMDMACTLR_SENS_MASK                   (0x0000000CU)
#define CSL_CXSTM_TETRIS_STMDMACTLR_SENS_SHIFT                  (2U)
#define CSL_CXSTM_TETRIS_STMDMACTLR_SENS_RESETVAL               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMDMACTLR_SENS_EMPTY                  (0x00000000U)
#define CSL_CXSTM_TETRIS_STMDMACTLR_SENS_PCT25                  (0x00000001U)
#define CSL_CXSTM_TETRIS_STMDMACTLR_SENS_PCT50                  (0x00000002U)
#define CSL_CXSTM_TETRIS_STMDMACTLR_SENS_PCT75                  (0x00000003U)

#define CSL_CXSTM_TETRIS_STMDMACTLR_RESETVAL                    (0x00000000U)

/* STMDMAIDR */

#define CSL_CXSTM_TETRIS_STMDMAIDR_CLASS_MASK                   (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMDMAIDR_CLASS_SHIFT                  (0U)
#define CSL_CXSTM_TETRIS_STMDMAIDR_CLASS_RESETVAL               (0x00000002U)
#define CSL_CXSTM_TETRIS_STMDMAIDR_CLASS_MAX                    (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMDMAIDR_CLASSREV_MASK                (0x000000F0U)
#define CSL_CXSTM_TETRIS_STMDMAIDR_CLASSREV_SHIFT               (4U)
#define CSL_CXSTM_TETRIS_STMDMAIDR_CLASSREV_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMDMAIDR_CLASSREV_MAX                 (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMDMAIDR_VENDSPEC_MASK                (0x00000F00U)
#define CSL_CXSTM_TETRIS_STMDMAIDR_VENDSPEC_SHIFT               (8U)
#define CSL_CXSTM_TETRIS_STMDMAIDR_VENDSPEC_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMDMAIDR_VENDSPEC_MAX                 (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMDMAIDR_RESETVAL                     (0x00000002U)

/* STMHEER */

#define CSL_CXSTM_TETRIS_STMHEER_HEE_MASK                       (0xFFFFFFFFU)
#define CSL_CXSTM_TETRIS_STMHEER_HEE_SHIFT                      (0U)
#define CSL_CXSTM_TETRIS_STMHEER_HEE_RESETVAL                   (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEER_HEE_MAX                        (0xffffffffU)

#define CSL_CXSTM_TETRIS_STMHEER_RESETVAL                       (0x00000000U)

/* STMHETER */

#define CSL_CXSTM_TETRIS_STMHETER_HETE_MASK                     (0xFFFFFFFFU)
#define CSL_CXSTM_TETRIS_STMHETER_HETE_SHIFT                    (0U)
#define CSL_CXSTM_TETRIS_STMHETER_HETE_RESETVAL                 (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHETER_HETE_MAX                      (0xffffffffU)

#define CSL_CXSTM_TETRIS_STMHETER_RESETVAL                      (0x00000000U)

/* STMHEMCR */

#define CSL_CXSTM_TETRIS_STMHEMCR_EN_MASK                       (0x00000001U)
#define CSL_CXSTM_TETRIS_STMHEMCR_EN_SHIFT                      (0U)
#define CSL_CXSTM_TETRIS_STMHEMCR_EN_RESETVAL                   (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_EN_DISABLE                    (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_EN_ENABLE                     (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEMCR_COMPEN_MASK                   (0x00000002U)
#define CSL_CXSTM_TETRIS_STMHEMCR_COMPEN_SHIFT                  (1U)
#define CSL_CXSTM_TETRIS_STMHEMCR_COMPEN_RESETVAL               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_COMPEN_DISABLE                (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_COMPEN_ENABLE                 (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEMCR_ERRDETECT_MASK                (0x00000004U)
#define CSL_CXSTM_TETRIS_STMHEMCR_ERRDETECT_SHIFT               (2U)
#define CSL_CXSTM_TETRIS_STMHEMCR_ERRDETECT_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_ERRDETECT_DISABLE             (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_ERRDETECT_ENABLE              (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCTL_MASK                  (0x00000010U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCTL_SHIFT                 (4U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCTL_RESETVAL              (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCTL_MULTI_SHOT            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCTL_SINGLE_SHOT           (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGSTATUS_MASK               (0x00000020U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGSTATUS_SHIFT              (5U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGSTATUS_RESETVAL           (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGSTATUS_NOT_OCCURRED       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGSTATUS_OCCURRED           (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCLEAR_MASK                (0x00000040U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCLEAR_SHIFT               (6U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCLEAR_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCLEAR_NOEFFECT            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_TRIGCLEAR_CLEAR               (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEMCR_ATBTRIGEN_MASK                (0x00000080U)
#define CSL_CXSTM_TETRIS_STMHEMCR_ATBTRIGEN_SHIFT               (7U)
#define CSL_CXSTM_TETRIS_STMHEMCR_ATBTRIGEN_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_ATBTRIGEN_DISABLE             (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEMCR_ATBTRIGEN_ENABLE              (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEMCR_RESETVAL                      (0x00000000U)

/* STMHEMASTR */

#define CSL_CXSTM_TETRIS_STMHEMASTR_MASTER_MASK                 (0x0000FFFFU)
#define CSL_CXSTM_TETRIS_STMHEMASTR_MASTER_SHIFT                (0U)
#define CSL_CXSTM_TETRIS_STMHEMASTR_MASTER_RESETVAL             (0x00000080U)
#define CSL_CXSTM_TETRIS_STMHEMASTR_MASTER_MAX                  (0x0000ffffU)

#define CSL_CXSTM_TETRIS_STMHEMASTR_RESETVAL                    (0x00000080U)

/* STMHEFEAT1R */

#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HETER_MASK                 (0x00000001U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HETER_SHIFT                (0U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HETER_RESETVAL             (0x00000001U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HETER_IMPLEMENTED          (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HEERR_MASK                 (0x00000004U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HEERR_SHIFT                (2U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HEERR_RESETVAL             (0x00000001U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HEERR_IMPLEMENTED          (0x00000001U)

#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HEMASTR_MASK               (0x00000008U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HEMASTR_SHIFT              (3U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HEMASTR_RESETVAL           (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HEMASTR_RO                 (0x00000000U)

#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HECOMP_MASK                (0x00000030U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HECOMP_SHIFT               (4U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HECOMP_RESETVAL            (0x00000003U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_HECOMP_RO                  (0x00000003U)

#define CSL_CXSTM_TETRIS_STMHEFEAT1R_NUMHE_MASK                 (0x00FF8000U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_NUMHE_SHIFT                (15U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_NUMHE_RESETVAL             (0x00000020U)
#define CSL_CXSTM_TETRIS_STMHEFEAT1R_NUMHE_MAX                  (0x000001ffU)

#define CSL_CXSTM_TETRIS_STMHEFEAT1R_RESETVAL                   (0x00100035U)

/* STMHEIDR */

#define CSL_CXSTM_TETRIS_STMHEIDR_CLASS_MASK                    (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMHEIDR_CLASS_SHIFT                   (0U)
#define CSL_CXSTM_TETRIS_STMHEIDR_CLASS_RESETVAL                (0x00000001U)
#define CSL_CXSTM_TETRIS_STMHEIDR_CLASS_MAX                     (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMHEIDR_CLASSREV_MASK                 (0x000000F0U)
#define CSL_CXSTM_TETRIS_STMHEIDR_CLASSREV_SHIFT                (4U)
#define CSL_CXSTM_TETRIS_STMHEIDR_CLASSREV_RESETVAL             (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEIDR_CLASSREV_MAX                  (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMHEIDR_VENDSPEC_MASK                 (0x00000F00U)
#define CSL_CXSTM_TETRIS_STMHEIDR_VENDSPEC_SHIFT                (8U)
#define CSL_CXSTM_TETRIS_STMHEIDR_VENDSPEC_RESETVAL             (0x00000000U)
#define CSL_CXSTM_TETRIS_STMHEIDR_VENDSPEC_MAX                  (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMHEIDR_RESETVAL                      (0x00000001U)

/* STMSPER */

#define CSL_CXSTM_TETRIS_STMSPER_SPE_MASK                       (0xFFFFFFFFU)
#define CSL_CXSTM_TETRIS_STMSPER_SPE_SHIFT                      (0U)
#define CSL_CXSTM_TETRIS_STMSPER_SPE_RESETVAL                   (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPER_SPE_MAX                        (0xffffffffU)

#define CSL_CXSTM_TETRIS_STMSPER_RESETVAL                       (0x00000000U)

/* STMSPTER */

#define CSL_CXSTM_TETRIS_STMSPTER_SPTE_MASK                     (0xFFFFFFFFU)
#define CSL_CXSTM_TETRIS_STMSPTER_SPTE_SHIFT                    (0U)
#define CSL_CXSTM_TETRIS_STMSPTER_SPTE_RESETVAL                 (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTER_SPTE_MAX                      (0xffffffffU)

#define CSL_CXSTM_TETRIS_STMSPTER_RESETVAL                      (0x00000000U)

/* STMSPSCR */

#define CSL_CXSTM_TETRIS_STMSPSCR_PORTCTL_MASK                  (0x00000003U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTCTL_SHIFT                 (0U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTCTL_RESETVAL              (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTCTL_NOTUSED               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTCTL_STMSPTER_ONLY         (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTCTL_RESERVED              (0x00000002U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTCTL_STMSPERANDSTMSPTER    (0x00000003U)

#define CSL_CXSTM_TETRIS_STMSPSCR_PORTSEL_MASK                  (0xFFF00000U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTSEL_SHIFT                 (20U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTSEL_RESETVAL              (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPSCR_PORTSEL_MAX                   (0x00000fffU)

#define CSL_CXSTM_TETRIS_STMSPSCR_RESETVAL                      (0x00000000U)

/* STMSPMSCR */

#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTCTL_MASK                 (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTCTL_SHIFT                (0U)
#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTCTL_RESETVAL             (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTCTL_NOTUSED              (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTCTL_STMSPSCR             (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTSEL_MASK                 (0x007F8000U)
#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTSEL_SHIFT                (15U)
#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTSEL_RESETVAL             (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPMSCR_MASTSEL_MAX                  (0x000000ffU)

#define CSL_CXSTM_TETRIS_STMSPMSCR_RESETVAL                     (0x00000000U)

/* STMSPOVERRIDER */

#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERCTL_MASK            (0x00000003U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERCTL_SHIFT           (0U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERCTL_RESETVAL        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERCTL_DISABLED        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERCTL_GUARANTEED      (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERCTL_INVARIANTTIMING  (0x00000002U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERCTL_RESERVED        (0x00000003U)

#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERTS_MASK             (0x00000004U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERTS_SHIFT            (2U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERTS_RESETVAL         (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERTS_DISABLED         (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_OVERTS_ENABLED          (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_PORTSEL_MASK            (0xFFFF8000U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_PORTSEL_SHIFT           (15U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_PORTSEL_RESETVAL        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_PORTSEL_MAX             (0x0001ffffU)

#define CSL_CXSTM_TETRIS_STMSPOVERRIDER_RESETVAL                (0x00000000U)

/* STMSPMOVERRIDER */

#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTCTL_MASK           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTCTL_SHIFT          (0U)
#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTCTL_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTCTL_DISABLED       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTCTL_ENABLED        (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTSEL_MASK           (0x007F8000U)
#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTSEL_SHIFT          (15U)
#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTSEL_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_MASTSEL_MAX            (0x000000ffU)

#define CSL_CXSTM_TETRIS_STMSPMOVERRIDER_RESETVAL               (0x00000000U)

/* STMSPTRIGCSR */

#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCTL_MASK              (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCTL_SHIFT             (0U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCTL_RESETVAL          (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCTL_MULTI_SHOT        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCTL_SINGLE_SHOT       (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGSTATUS_MASK           (0x00000002U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGSTATUS_SHIFT          (1U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGSTATUS_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGSTATUS_NOT_OCCURRED   (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGSTATUS_OCCURRED       (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCLEAR_MASK            (0x00000004U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCLEAR_SHIFT           (2U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCLEAR_RESETVAL        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCLEAR_NOEFFECT        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_TRIGCLEAR_CLEAR           (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_TE_MASK         (0x00000008U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_TE_SHIFT        (3U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_TE_RESETVAL     (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_TE_DISABLE      (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_TE_ENABLE       (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_DIR_MASK        (0x00000010U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_DIR_SHIFT       (4U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_DIR_RESETVAL    (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_DIR_DISABLE     (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_ATBTRIGEN_DIR_ENABLE      (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPTRIGCSR_RESETVAL                  (0x00000000U)

/* STMTCSR */

#define CSL_CXSTM_TETRIS_STMTCSR_EN_MASK                        (0x00000001U)
#define CSL_CXSTM_TETRIS_STMTCSR_EN_SHIFT                       (0U)
#define CSL_CXSTM_TETRIS_STMTCSR_EN_RESETVAL                    (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_EN_DISABLE                     (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_EN_ENABLE                      (0x00000001U)

#define CSL_CXSTM_TETRIS_STMTCSR_TSEN_MASK                      (0x00000002U)
#define CSL_CXSTM_TETRIS_STMTCSR_TSEN_SHIFT                     (1U)
#define CSL_CXSTM_TETRIS_STMTCSR_TSEN_RESETVAL                  (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_TSEN_DISABLE                   (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_TSEN_ENABLE                    (0x00000001U)

#define CSL_CXSTM_TETRIS_STMTCSR_SYNCEN_MASK                    (0x00000004U)
#define CSL_CXSTM_TETRIS_STMTCSR_SYNCEN_SHIFT                   (2U)
#define CSL_CXSTM_TETRIS_STMTCSR_SYNCEN_RESETVAL                (0x00000001U)
#define CSL_CXSTM_TETRIS_STMTCSR_SYNCEN_RAO                     (0x00000001U)

#define CSL_CXSTM_TETRIS_STMTCSR_COMPEN_MASK                    (0x00000020U)
#define CSL_CXSTM_TETRIS_STMTCSR_COMPEN_SHIFT                   (5U)
#define CSL_CXSTM_TETRIS_STMTCSR_COMPEN_RESETVAL                (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_COMPEN_DISABLED                (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_COMPEN_ENABLED                 (0x00000001U)

#define CSL_CXSTM_TETRIS_STMTCSR_TRACEID_MASK                   (0x007F0000U)
#define CSL_CXSTM_TETRIS_STMTCSR_TRACEID_SHIFT                  (16U)
#define CSL_CXSTM_TETRIS_STMTCSR_TRACEID_RESETVAL               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_TRACEID_MAX                    (0x0000007fU)

#define CSL_CXSTM_TETRIS_STMTCSR_BUSY_MASK                      (0x00800000U)
#define CSL_CXSTM_TETRIS_STMTCSR_BUSY_SHIFT                     (23U)
#define CSL_CXSTM_TETRIS_STMTCSR_BUSY_RESETVAL                  (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_BUSY_IDLE                      (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTCSR_BUSY_BUSY                      (0x00000001U)

#define CSL_CXSTM_TETRIS_STMTCSR_RESETVAL                       (0x00000004U)

/* STMTSSTIMR */

#define CSL_CXSTM_TETRIS_STMTSSTIMR_FORCETS_MASK                (0x00000001U)
#define CSL_CXSTM_TETRIS_STMTSSTIMR_FORCETS_SHIFT               (0U)
#define CSL_CXSTM_TETRIS_STMTSSTIMR_FORCETS_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTSSTIMR_FORCETS_FORCETS             (0x00000001U)

#define CSL_CXSTM_TETRIS_STMTSSTIMR_RESETVAL                    (0x00000000U)

/* STMTSFREQR */

#define CSL_CXSTM_TETRIS_STMTSFREQR_FREQ_MASK                   (0xFFFFFFFFU)
#define CSL_CXSTM_TETRIS_STMTSFREQR_FREQ_SHIFT                  (0U)
#define CSL_CXSTM_TETRIS_STMTSFREQR_FREQ_RESETVAL               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMTSFREQR_FREQ_MAX                    (0xffffffffU)

#define CSL_CXSTM_TETRIS_STMTSFREQR_RESETVAL                    (0x00000000U)

/* STMSYNCR */

#define CSL_CXSTM_TETRIS_STMSYNCR_COUNT_MASK                    (0x00000FFCU)
#define CSL_CXSTM_TETRIS_STMSYNCR_COUNT_SHIFT                   (2U)
#define CSL_CXSTM_TETRIS_STMSYNCR_COUNT_RESETVAL                (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSYNCR_COUNT_MAX                     (0x000003ffU)

#define CSL_CXSTM_TETRIS_STMSYNCR_MODE_MASK                     (0x00001000U)
#define CSL_CXSTM_TETRIS_STMSYNCR_MODE_SHIFT                    (12U)
#define CSL_CXSTM_TETRIS_STMSYNCR_MODE_RESETVAL                 (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSYNCR_MODE_NBYTES                   (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSYNCR_MODE_TWOTOTHENBYTES           (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSYNCR_RESETVAL                      (0x00000000U)

/* STMAUXCR */

#define CSL_CXSTM_TETRIS_STMAUXCR_FIFOAF_MASK                   (0x00000001U)
#define CSL_CXSTM_TETRIS_STMAUXCR_FIFOAF_SHIFT                  (0U)
#define CSL_CXSTM_TETRIS_STMAUXCR_FIFOAF_RESETVAL               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_FIFOAF_DISABLED               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_FIFOAF_ENABLED                (0x00000001U)

#define CSL_CXSTM_TETRIS_STMAUXCR_ASYNCPE_MASK                  (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUXCR_ASYNCPE_SHIFT                 (1U)
#define CSL_CXSTM_TETRIS_STMAUXCR_ASYNCPE_RESETVAL              (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_ASYNCPE_DISABLE               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_ASYNCPE_ENABLE                (0x00000001U)

#define CSL_CXSTM_TETRIS_STMAUXCR_PRIORINVDIS_MASK              (0x00000004U)
#define CSL_CXSTM_TETRIS_STMAUXCR_PRIORINVDIS_SHIFT             (2U)
#define CSL_CXSTM_TETRIS_STMAUXCR_PRIORINVDIS_RESETVAL          (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_PRIORINVDIS_INVERSIONENABLED  (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_PRIORINVDIS_INVERSIONDISABLED  (0x00000001U)

#define CSL_CXSTM_TETRIS_STMAUXCR_CLKON_MASK                    (0x00000008U)
#define CSL_CXSTM_TETRIS_STMAUXCR_CLKON_SHIFT                   (3U)
#define CSL_CXSTM_TETRIS_STMAUXCR_CLKON_RESETVAL                (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_CLKON_NOOVERRIDE              (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_CLKON_OVERRIDE                (0x00000001U)

#define CSL_CXSTM_TETRIS_STMAUXCR_AFREADYHIGH_MASK              (0x00000010U)
#define CSL_CXSTM_TETRIS_STMAUXCR_AFREADYHIGH_SHIFT             (4U)
#define CSL_CXSTM_TETRIS_STMAUXCR_AFREADYHIGH_RESETVAL          (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_AFREADYHIGH_NOOVERRIDE        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMAUXCR_AFREADYHIGH_OVERRIDE          (0x00000001U)

#define CSL_CXSTM_TETRIS_STMAUXCR_RESETVAL                      (0x00000000U)

/* STMSPFEAT1R */

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_PROT_MASK                  (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_PROT_SHIFT                 (0U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_PROT_RESETVAL              (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_PROT_MAX                   (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TS_MASK                    (0x00000030U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TS_SHIFT                   (4U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TS_RESETVAL                (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TS_ABSOLUT                 (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TSFREQ_MASK                (0x00000040U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TSFREQ_SHIFT               (6U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TSFREQ_RESETVAL            (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TSFREQ_RW                  (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_FORCETS_MASK               (0x00000080U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_FORCETS_SHIFT              (7U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_FORCETS_RESETVAL           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_FORCETS_IMPLEMENTED        (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SYNC_MASK                  (0x00000300U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SYNC_SHIFT                 (8U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SYNC_RESETVAL              (0x00000003U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SYNC_MODE                  (0x00000003U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TRACEBUS_MASK              (0x00003C00U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TRACEBUS_SHIFT             (10U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TRACEBUS_RESETVAL          (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TRACEBUS_MAX               (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TRIGCTL_MASK               (0x0000C000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TRIGCTL_SHIFT              (14U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TRIGCTL_RESETVAL           (0x00000002U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TRIGCTL_MULTI_SHOTANDSINGLE_SHOT  (0x00000002U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TSPRESCALE_MASK            (0x00030000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TSPRESCALE_SHIFT           (16U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TSPRESCALE_RESETVAL        (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_TSPRESCALE_NOTIMPLEMENTED  (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_HWTEN_MASK                 (0x000C0000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_HWTEN_SHIFT                (18U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_HWTEN_RESETVAL             (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_HWTEN_NOTIMPLEMENTED       (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SYNCEN_MASK                (0x00300000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SYNCEN_SHIFT               (20U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SYNCEN_RESETVAL            (0x00000002U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SYNCEN_RAO                 (0x00000002U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SWOEN_MASK                 (0x00C00000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SWOEN_SHIFT                (22U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SWOEN_RESETVAL             (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT1R_SWOEN_NOTIMPLEMENTED       (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT1R_RESETVAL                   (0x006587d1U)

/* STMSPFEAT2R */

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTER_MASK                 (0x00000003U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTER_SHIFT                (0U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTER_RESETVAL             (0x00000002U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTER_IMPLEMENTED          (0x00000002U)

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPER_MASK                  (0x00000004U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPER_SHIFT                 (2U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPER_RESETVAL              (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPER_IMPLEMENTED           (0x00000000U)

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPCOMP_MASK                (0x00000030U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPCOMP_SHIFT               (4U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPCOMP_RESETVAL            (0x00000003U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPCOMP_PROGRAMMABLE        (0x00000003U)

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPOVERRIDE_MASK            (0x00000040U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPOVERRIDE_SHIFT           (6U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPOVERRIDE_RESETVAL        (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPOVERRIDE_IMPLEMENTED     (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_PRIVMASK_MASK              (0x00000180U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_PRIVMASK_SHIFT             (7U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_PRIVMASK_RESETVAL          (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_PRIVMASK_NOTIMPLEMENTED    (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTRTYPE_MASK              (0x00000600U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTRTYPE_SHIFT             (9U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTRTYPE_RESETVAL          (0x00000002U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTRTYPE_INVARIANTTIMINGANDGUARANTEED  (0x00000002U)

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_DSIZE_MASK                 (0x0000F000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_DSIZE_SHIFT                (12U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_DSIZE_RESETVAL             (0x00000000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_DSIZE_MAX                  (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTYPE_MASK                (0x00030000U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTYPE_SHIFT               (16U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTYPE_RESETVAL            (0x00000001U)
#define CSL_CXSTM_TETRIS_STMSPFEAT2R_SPTYPE_EXTENDEDONLY        (0x00000001U)

#define CSL_CXSTM_TETRIS_STMSPFEAT2R_RESETVAL                   (0x000104f2U)

/* STMSPFEAT3R */

#define CSL_CXSTM_TETRIS_STMSPFEAT3R_NUMMAST_MASK               (0x0000007FU)
#define CSL_CXSTM_TETRIS_STMSPFEAT3R_NUMMAST_SHIFT              (0U)
#define CSL_CXSTM_TETRIS_STMSPFEAT3R_NUMMAST_RESETVAL           (0x0000007fU)
#define CSL_CXSTM_TETRIS_STMSPFEAT3R_NUMMAST_MAX                (0x0000007fU)

#define CSL_CXSTM_TETRIS_STMSPFEAT3R_RESETVAL                   (0x0000007fU)

/* STMITTRIGGER */

#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSPTE_W_MASK        (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSPTE_W_SHIFT       (0U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSPTE_W_RESETVAL    (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSPTE_W_HIGH        (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSPTE_W_LOW         (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSW_W_MASK          (0x00000002U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSW_W_SHIFT         (1U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSW_W_RESETVAL      (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSW_W_HIGH          (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTSW_W_LOW           (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTHETE_W_MASK        (0x00000004U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTHETE_W_SHIFT       (2U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTHETE_W_RESETVAL    (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTHETE_W_HIGH        (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_TRIGOUTHETE_W_LOW         (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITTRIGGER_ASYNCOUT_W_MASK           (0x00000008U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_ASYNCOUT_W_SHIFT          (3U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_ASYNCOUT_W_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_ASYNCOUT_W_HIGH           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITTRIGGER_ASYNCOUT_W_LOW            (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITTRIGGER_RESETVAL                  (0x00000000U)

/* STMITATBDATA0 */

#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM0_W_MASK          (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM0_W_SHIFT         (0U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM0_W_RESETVAL      (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM0_W_HIGH          (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM0_W_LOW           (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM7_W_MASK          (0x00000002U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM7_W_SHIFT         (1U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM7_W_RESETVAL      (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM7_W_HIGH          (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM7_W_LOW           (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM15_W_MASK         (0x00000004U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM15_W_SHIFT        (2U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM15_W_RESETVAL     (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM15_W_HIGH         (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM15_W_LOW          (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM23_W_MASK         (0x00000008U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM23_W_SHIFT        (3U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM23_W_RESETVAL     (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM23_W_HIGH         (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM23_W_LOW          (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM31_W_MASK         (0x00000010U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM31_W_SHIFT        (4U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM31_W_RESETVAL     (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM31_W_HIGH         (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBDATA0_ATDATAM31_W_LOW          (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBDATA0_RESETVAL                 (0x00000000U)

/* STMITATBCTR2 */

#define CSL_CXSTM_TETRIS_STMITATBCTR2_ATREADYM_R_MASK           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBCTR2_ATREADYM_R_SHIFT          (0U)
#define CSL_CXSTM_TETRIS_STMITATBCTR2_ATREADYM_R_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBCTR2_ATREADYM_R_HIGH           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBCTR2_ATREADYM_R_LOW            (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBCTR2_AFVALIDM_R_MASK           (0x00000002U)
#define CSL_CXSTM_TETRIS_STMITATBCTR2_AFVALIDM_R_SHIFT          (1U)
#define CSL_CXSTM_TETRIS_STMITATBCTR2_AFVALIDM_R_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBCTR2_AFVALIDM_R_HIGH           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBCTR2_AFVALIDM_R_LOW            (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBCTR2_RESETVAL                  (0x00000000U)

/* STMITATBID */

#define CSL_CXSTM_TETRIS_STMITATBID_ATIDM_W_MASK                (0x0000007FU)
#define CSL_CXSTM_TETRIS_STMITATBID_ATIDM_W_SHIFT               (0U)
#define CSL_CXSTM_TETRIS_STMITATBID_ATIDM_W_RESETVAL            (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBID_ATIDM_W_MAX                 (0x0000007fU)

#define CSL_CXSTM_TETRIS_STMITATBID_RESETVAL                    (0x00000000U)

/* STMITATBCTR0 */

#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATVALIDM_W_MASK           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATVALIDM_W_SHIFT          (0U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATVALIDM_W_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATVALIDM_W_HIGH           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATVALIDM_W_LOW            (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBCTR0_AFREADYM_W_MASK           (0x00000002U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_AFREADYM_W_SHIFT          (1U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_AFREADYM_W_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_AFREADYM_W_HIGH           (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_AFREADYM_W_LOW            (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATBYTESM_W_MASK           (0x00000300U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATBYTESM_W_SHIFT          (8U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATBYTESM_W_RESETVAL       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATBYTESM_W_L11            (0x00000003U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATBYTESM_W_L10            (0x00000002U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATBYTESM_W_L01            (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITATBCTR0_ATBYTESM_W_L00            (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITATBCTR0_RESETVAL                  (0x00000000U)

/* STMITCTRL */

#define CSL_CXSTM_TETRIS_STMITCTRL_INTEGRATION_MODE_MASK        (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITCTRL_INTEGRATION_MODE_SHIFT       (0U)
#define CSL_CXSTM_TETRIS_STMITCTRL_INTEGRATION_MODE_RESETVAL    (0x00000000U)
#define CSL_CXSTM_TETRIS_STMITCTRL_INTEGRATION_MODE_INTEGRATIONMODE  (0x00000001U)
#define CSL_CXSTM_TETRIS_STMITCTRL_INTEGRATION_MODE_FUNCTIONALMODE  (0x00000000U)

#define CSL_CXSTM_TETRIS_STMITCTRL_RESETVAL                     (0x00000000U)

/* STMCLAIMSET */

#define CSL_CXSTM_TETRIS_STMCLAIMSET_CLAIMSET_R_MASK            (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMCLAIMSET_CLAIMSET_R_SHIFT           (0U)
#define CSL_CXSTM_TETRIS_STMCLAIMSET_CLAIMSET_R_RESETVAL        (0x0000000fU)
#define CSL_CXSTM_TETRIS_STMCLAIMSET_CLAIMSET_R_MAX             (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMCLAIMSET_CLAIMSET_W_MASK            (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMCLAIMSET_CLAIMSET_W_SHIFT           (0U)
#define CSL_CXSTM_TETRIS_STMCLAIMSET_CLAIMSET_W_RESETVAL        (0x0000000fU)
#define CSL_CXSTM_TETRIS_STMCLAIMSET_CLAIMSET_W_MAX             (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMCLAIMSET_RESETVAL                   (0x0000000fU)

/* STMCLAIMCLR */

#define CSL_CXSTM_TETRIS_STMCLAIMCLR_CLAIMCLR_R_MASK            (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMCLAIMCLR_CLAIMCLR_R_SHIFT           (0U)
#define CSL_CXSTM_TETRIS_STMCLAIMCLR_CLAIMCLR_R_RESETVAL        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMCLAIMCLR_CLAIMCLR_R_MAX             (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMCLAIMCLR_CLAIMCLR_W_MASK            (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMCLAIMCLR_CLAIMCLR_W_SHIFT           (0U)
#define CSL_CXSTM_TETRIS_STMCLAIMCLR_CLAIMCLR_W_RESETVAL        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMCLAIMCLR_CLAIMCLR_W_MAX             (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMCLAIMCLR_RESETVAL                   (0x00000000U)

/* STMLAR */

#define CSL_CXSTM_TETRIS_STMLAR_ACCESS_W_MASK                   (0xFFFFFFFFU)
#define CSL_CXSTM_TETRIS_STMLAR_ACCESS_W_SHIFT                  (0U)
#define CSL_CXSTM_TETRIS_STMLAR_ACCESS_W_RESETVAL               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMLAR_ACCESS_W_MAX                    (0xffffffffU)

#define CSL_CXSTM_TETRIS_STMLAR_RESETVAL                        (0x00000000U)

/* STMLSR */

#define CSL_CXSTM_TETRIS_STMLSR_LOCKEXIST_MASK                  (0x00000001U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKEXIST_SHIFT                 (0U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKEXIST_RESETVAL              (0x00000001U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKEXIST_LOCKNOTPRESENT        (0x00000000U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKEXIST_LOCKPRESENT           (0x00000001U)

#define CSL_CXSTM_TETRIS_STMLSR_LOCKGRANT_MASK                  (0x00000002U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKGRANT_SHIFT                 (1U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKGRANT_RESETVAL              (0x00000001U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKGRANT_ACCESSPERMITTED       (0x00000000U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKGRANT_DEVICELOCKED          (0x00000001U)

#define CSL_CXSTM_TETRIS_STMLSR_LOCKTYPE_MASK                   (0x00000004U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKTYPE_SHIFT                  (2U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKTYPE_RESETVAL               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMLSR_LOCKTYPE_LAR32BIT               (0x00000000U)

#define CSL_CXSTM_TETRIS_STMLSR_RESETVAL                        (0x00000003U)

/* STMAUTHSTATUS */

#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSID_MASK                (0x00000003U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSID_SHIFT               (0U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSID_RESETVAL            (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSID_DISABLED            (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSID_ENABLED             (0x00000003U)

#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSNID_MASK               (0x0000000CU)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSNID_SHIFT              (2U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSNID_RESETVAL           (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSNID_DISABLED           (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_NSNID_ENABLED            (0x00000003U)

#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SID_MASK                 (0x00000030U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SID_SHIFT                (4U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SID_RESETVAL             (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SID_DISABLED             (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SID_ENABLED              (0x00000003U)

#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SNID_MASK                (0x000000C0U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SNID_SHIFT               (6U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SNID_RESETVAL            (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SNID_DISABLED            (0x00000002U)
#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_SNID_ENABLED             (0x00000003U)

#define CSL_CXSTM_TETRIS_STMAUTHSTATUS_RESETVAL                 (0x000000aaU)

/* STMDEVID */

#define CSL_CXSTM_TETRIS_STMDEVID_NUMSP_MASK                    (0x0001FFFFU)
#define CSL_CXSTM_TETRIS_STMDEVID_NUMSP_SHIFT                   (0U)
#define CSL_CXSTM_TETRIS_STMDEVID_NUMSP_RESETVAL                (0x00010000U)
#define CSL_CXSTM_TETRIS_STMDEVID_NUMSP_MAX                     (0x0001ffffU)

#define CSL_CXSTM_TETRIS_STMDEVID_RESETVAL                      (0x00010000U)

/* STMDEVTYPE */

#define CSL_CXSTM_TETRIS_STMDEVTYPE_MAJOR_TYPE_MASK             (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMDEVTYPE_MAJOR_TYPE_SHIFT            (0U)
#define CSL_CXSTM_TETRIS_STMDEVTYPE_MAJOR_TYPE_RESETVAL         (0x00000003U)
#define CSL_CXSTM_TETRIS_STMDEVTYPE_MAJOR_TYPE_MAX              (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMDEVTYPE_SUB_TYPE_MASK               (0x000000F0U)
#define CSL_CXSTM_TETRIS_STMDEVTYPE_SUB_TYPE_SHIFT              (4U)
#define CSL_CXSTM_TETRIS_STMDEVTYPE_SUB_TYPE_RESETVAL           (0x00000006U)
#define CSL_CXSTM_TETRIS_STMDEVTYPE_SUB_TYPE_MAX                (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMDEVTYPE_RESETVAL                    (0x00000063U)

/* STMPIDR0 */

#define CSL_CXSTM_TETRIS_STMPIDR0_PART_NUMBER_BITS7TO0_MASK     (0x000000FFU)
#define CSL_CXSTM_TETRIS_STMPIDR0_PART_NUMBER_BITS7TO0_SHIFT    (0U)
#define CSL_CXSTM_TETRIS_STMPIDR0_PART_NUMBER_BITS7TO0_RESETVAL  (0x00000062U)
#define CSL_CXSTM_TETRIS_STMPIDR0_PART_NUMBER_BITS7TO0_MAX      (0x000000ffU)

#define CSL_CXSTM_TETRIS_STMPIDR0_RESETVAL                      (0x00000062U)

/* STMPIDR1 */

#define CSL_CXSTM_TETRIS_STMPIDR1_PART_NUMBER_BITS11TO8_MASK    (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMPIDR1_PART_NUMBER_BITS11TO8_SHIFT   (0U)
#define CSL_CXSTM_TETRIS_STMPIDR1_PART_NUMBER_BITS11TO8_RESETVAL  (0x00000009U)
#define CSL_CXSTM_TETRIS_STMPIDR1_PART_NUMBER_BITS11TO8_MAX     (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMPIDR1_JEP106_BITS3TO0_MASK          (0x000000F0U)
#define CSL_CXSTM_TETRIS_STMPIDR1_JEP106_BITS3TO0_SHIFT         (4U)
#define CSL_CXSTM_TETRIS_STMPIDR1_JEP106_BITS3TO0_RESETVAL      (0x0000000bU)
#define CSL_CXSTM_TETRIS_STMPIDR1_JEP106_BITS3TO0_MAX           (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMPIDR1_RESETVAL                      (0x000000b9U)

/* STMPIDR2 */

#define CSL_CXSTM_TETRIS_STMPIDR2_JEP106_BITS6TO4_MASK          (0x00000007U)
#define CSL_CXSTM_TETRIS_STMPIDR2_JEP106_BITS6TO4_SHIFT         (0U)
#define CSL_CXSTM_TETRIS_STMPIDR2_JEP106_BITS6TO4_RESETVAL      (0x00000003U)
#define CSL_CXSTM_TETRIS_STMPIDR2_JEP106_BITS6TO4_ARMJEP106IDENTITYCODE64  (0x00000003U)

#define CSL_CXSTM_TETRIS_STMPIDR2_JEDEC_MASK                    (0x00000008U)
#define CSL_CXSTM_TETRIS_STMPIDR2_JEDEC_SHIFT                   (3U)
#define CSL_CXSTM_TETRIS_STMPIDR2_JEDEC_RESETVAL                (0x00000001U)
#define CSL_CXSTM_TETRIS_STMPIDR2_JEDEC_JEDECIDENTITY           (0x00000001U)

#define CSL_CXSTM_TETRIS_STMPIDR2_REVISION_MASK                 (0x000000F0U)
#define CSL_CXSTM_TETRIS_STMPIDR2_REVISION_SHIFT                (4U)
#define CSL_CXSTM_TETRIS_STMPIDR2_REVISION_RESETVAL             (0x00000001U)
#define CSL_CXSTM_TETRIS_STMPIDR2_REVISION_MAX                  (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMPIDR2_RESETVAL                      (0x0000001bU)

/* STMPIDR3 */

#define CSL_CXSTM_TETRIS_STMPIDR3_CUSTOMER_MODIFIED_MASK        (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMPIDR3_CUSTOMER_MODIFIED_SHIFT       (0U)
#define CSL_CXSTM_TETRIS_STMPIDR3_CUSTOMER_MODIFIED_RESETVAL    (0x00000000U)
#define CSL_CXSTM_TETRIS_STMPIDR3_CUSTOMER_MODIFIED_MAX         (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMPIDR3_REVAND_MASK                   (0x000000F0U)
#define CSL_CXSTM_TETRIS_STMPIDR3_REVAND_SHIFT                  (4U)
#define CSL_CXSTM_TETRIS_STMPIDR3_REVAND_RESETVAL               (0x00000000U)
#define CSL_CXSTM_TETRIS_STMPIDR3_REVAND_MAX                    (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMPIDR3_RESETVAL                      (0x00000000U)

/* STMPIDR4 */

#define CSL_CXSTM_TETRIS_STMPIDR4_JEP106_CONT_MASK              (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMPIDR4_JEP106_CONT_SHIFT             (0U)
#define CSL_CXSTM_TETRIS_STMPIDR4_JEP106_CONT_RESETVAL          (0x00000004U)
#define CSL_CXSTM_TETRIS_STMPIDR4_JEP106_CONT_MAX               (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMPIDR4_FOURKB_COUNT_MASK             (0x000000F0U)
#define CSL_CXSTM_TETRIS_STMPIDR4_FOURKB_COUNT_SHIFT            (4U)
#define CSL_CXSTM_TETRIS_STMPIDR4_FOURKB_COUNT_RESETVAL         (0x00000000U)
#define CSL_CXSTM_TETRIS_STMPIDR4_FOURKB_COUNT_MAX              (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMPIDR4_RESETVAL                      (0x00000004U)

/* STMPIDR5 */

#define CSL_CXSTM_TETRIS_STMPIDR5_RESETVAL                      (0x00000000U)

/* STMPIDR6 */

#define CSL_CXSTM_TETRIS_STMPIDR6_RESETVAL                      (0x00000000U)

/* STMPIDR7 */

#define CSL_CXSTM_TETRIS_STMPIDR7_RESETVAL                      (0x00000000U)

/* STMCIDR0 */

#define CSL_CXSTM_TETRIS_STMCIDR0_PREAMBLE_MASK                 (0x000000FFU)
#define CSL_CXSTM_TETRIS_STMCIDR0_PREAMBLE_SHIFT                (0U)
#define CSL_CXSTM_TETRIS_STMCIDR0_PREAMBLE_RESETVAL             (0x0000000dU)
#define CSL_CXSTM_TETRIS_STMCIDR0_PREAMBLE_MAX                  (0x000000ffU)

#define CSL_CXSTM_TETRIS_STMCIDR0_RESETVAL                      (0x0000000dU)

/* STMCIDR1 */

#define CSL_CXSTM_TETRIS_STMCIDR1_PREAMBLE_MASK                 (0x0000000FU)
#define CSL_CXSTM_TETRIS_STMCIDR1_PREAMBLE_SHIFT                (0U)
#define CSL_CXSTM_TETRIS_STMCIDR1_PREAMBLE_RESETVAL             (0x00000000U)
#define CSL_CXSTM_TETRIS_STMCIDR1_PREAMBLE_MAX                  (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMCIDR1_CLASS_MASK                    (0x000000F0U)
#define CSL_CXSTM_TETRIS_STMCIDR1_CLASS_SHIFT                   (4U)
#define CSL_CXSTM_TETRIS_STMCIDR1_CLASS_RESETVAL                (0x00000009U)
#define CSL_CXSTM_TETRIS_STMCIDR1_CLASS_MAX                     (0x0000000fU)

#define CSL_CXSTM_TETRIS_STMCIDR1_RESETVAL                      (0x00000090U)

/* STMCIDR2 */

#define CSL_CXSTM_TETRIS_STMCIDR2_PREAMBLE_MASK                 (0x000000FFU)
#define CSL_CXSTM_TETRIS_STMCIDR2_PREAMBLE_SHIFT                (0U)
#define CSL_CXSTM_TETRIS_STMCIDR2_PREAMBLE_RESETVAL             (0x00000005U)
#define CSL_CXSTM_TETRIS_STMCIDR2_PREAMBLE_MAX                  (0x000000ffU)

#define CSL_CXSTM_TETRIS_STMCIDR2_RESETVAL                      (0x00000005U)

/* STMCIDR3 */

#define CSL_CXSTM_TETRIS_STMCIDR3_PREAMBLE_MASK                 (0x000000FFU)
#define CSL_CXSTM_TETRIS_STMCIDR3_PREAMBLE_SHIFT                (0U)
#define CSL_CXSTM_TETRIS_STMCIDR3_PREAMBLE_RESETVAL             (0x000000b1U)
#define CSL_CXSTM_TETRIS_STMCIDR3_PREAMBLE_MAX                  (0x000000ffU)

#define CSL_CXSTM_TETRIS_STMCIDR3_RESETVAL                      (0x000000b1U)

#ifdef __cplusplus
}
#endif
#endif
